// ==================================================================================
// EN332S initial
// ==================================================================================
#define INI_Size	10
const UINT EN332S_INI[INI_Size][2] =
{
	//Address	, Data
	{ 0x00000031, 0x0000f705},	// STX_PO on
	{ 0x00000034, 0x00273333},	// Reclocker OFF
	{ 0x00000091, 0x0002481f},	// TXSDI output off
	{ 0x00000094, 0x000010b0},
	{ 0x000000db, 0x00000000},	// VD port driver strength
	{ 0x000000c8, 0x40004000},	// PCK phase delay
	{ 0x000000f7, 0x20170412},	// Ver. date
	{ 0x0000005d, 0x6e4e647e},
	{ 0x0000005e, 0xee6814e9},
	{ 0x000000c1, 0x00017f00}	// Global Clock Enable
};

#define UCC_INI_Size	12
const UINT UCC_INI[UCC_INI_Size][2] =
{
	{ 0x00000081, 0x19000110},	// UCC Ch. A 
	{ 0x00000082, 0x001f0200},
	{ 0x00000083, 0x0000000f},
	{ 0x00000084, 0x00ff5503},
	{ 0x00000085, 0x19000110},	// UCC Ch. B 
	{ 0x00000086, 0x10010400},
	{ 0x00000087, 0x002aa155},
	{ 0x00000088, 0x00ff5503},
	{ 0x000000c6, 0x00000010},
	{ 0x000003e5, 0x70000afc},	// 7byte 9600bps
	{ 0x000003eb, 0x70000afc},	// 7byte 9600bps
	{ 0x000000de, 0x000007f9}

};
